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| FDS4897C Dual N & P-Channel PowerTrench(R) MOSFET November 2005 FDS4897C Dual N & P-Channel PowerTrench(R) MOSFET General Description These dual N- and P-Channel enhancement mode power field effect transistors are produced using Fairchild Semiconductor's advanced PowerTrench process that has been especially tailored to minimize on-state resistance and yet maintain superior switching performance. Features * Q1: N-Channel RDS(on) = 29m @ VGS = 10V RDS(on) = 36m @ VGS = 4.5V * Q2: P-Channel 6.2A, 40V Application * * Inverter Power Supplies * * -4.4A, -40V RDS(on) = 46m @ VGS = -10V RDS(on) = 63m @ VGS = -4.5V High power handling capability in a widely used surface mount package RoHS compliant D1 D D1 D DD2 D2 D Q2 5 6 Q1 4 3 2 1 SO-8 Pin 1 SO-8 G1 S1 S G2 S2 G 7 8 S S Absolute Maximum Ratings Symbol VDSS VGSS ID PD Drain-Source Voltage Gate-Source Voltage TA = 25C unless otherwise noted Parameter Q1 40 20 (Note 1a) Q2 40 20 -4.4 -20 2 1.6 1 0.9 -55 to +150 Units V V A W - Continuous - Pulsed Power Dissipation for Dual Operation Power Dissipation for Single Operation Drain Current 6.2 20 (Note 1a) (Note 1b) (Note 1c) TJ, TSTG Operating and Storage Junction Temperature Range C Thermal Characteristics RJA RJC Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case (Note 1a) (Note 1) 78 40 C/W C/W Package Marking and Ordering Information Device Marking FDS4897C (c)2005 Fairchild Semiconductor Corporation FDS4897C Rev C(W) Device FDS4897C Reel Size 13" Tape width 12mm Quantity 2500 units www.fairchildsemi.com FDS4897C Dual N & P-Channel PowerTrench(R) MOSFET Electrical Characteristics Symbol EAS IAS TA = 25C unless otherwise noted Parameter Drain-Source Avalanche Energy (Single Pulse) Drain-Source Avalanche Current Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Body Leakage (Note 2) Test Conditions (Note 3) Type Min Typ Max Units Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 All 40 -40 34 -40 1 -1 100 7.3 -8.7 27 38 mJ mJ A Drain-Source Avalanche Ratings VDD = 40 V, ID = 7.3 A, L = 1 mH VDD = -40 V, ID =-8.7 A, L = 1 mH Off Characteristics BVDSS BVDSS TJ IDSS IGSS ID = 250 A VGS = 0 V, ID = -250 A VGS = 0 V, ID = 250 A, Referenced to 25C ID = -250 A, Referenced to 25C VDS = 32 V, VGS = 0 V VGS = 0 V VDS = -32 V, VDS = 0 V VGS = 20 V, ID = 250 A VDS = VGS, ID = -250 A VDS = VGS, ID = 250 A, Referenced to 25C ID = -250 A, Referenced to 25C VGS = 10 V, ID = 6.2 A ID = 4.8 A VGS = 4.5 V, VGS = 10 V, ID = 6.2 A, TJ = 125C ID = -4.4 A VGS = -10 V, ID = -3.8 A VGS = -4.5 V, VGS = -10 V, ID = -4.4 A, TJ = 125C VDS = 10 V, ID = 6.2 A ID =-4.4 A VDS = -10 V, Q1 VDS = 20 V, VGS = 0 V, f = 1.0 MHz Q2 VDS = -20 V, VGS = 0 V, f = 1.0 MHz f = 1.0 MHz V mV/C A nA On Characteristics VGS(th) VGS(th) TJ RDS(on) Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain-Source On-Resistance Q1 Q2 Q1 Q2 Q1 1 -1 1.9 -1.7 -5 4 21 26 29 37 50 55 21 12 760 1050 100 140 60 70 1.2 9 3 -3 V mV/C 29 36 43 46 63 73 m Q2 gFS Forward Transconductance Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 S Dynamic Characteristics Ciss Coss Crss RG Input Capacitance Output Capacitance Reverse Transfer Capacitance Gate Resistance pF pF pF FDS4897C Rev C(W) www.fairchildsemi.com FDS4897C Dual N & P-Channel PowerTrench(R) MOSFET Electrical Characteristics Symbol Parameter (continued) TA = 25C unless otherwise noted Test Conditions (Note 2) Type Min Typ Max Units Switching Characteristics td(on) tr td(off) tf Qg Qgs Qgd Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Q1 VDD = 20 V, VGS = 10V, ID = 1 A, RGEN = 6 Q2 VDD = -20 V, ID = -1 A, VGS = -10V, RGEN = 6 Q1 VDS = 20 V, ID = 6.2 A, VGS = 10 V Q2 VDS = -20 V, ID = -4.4 A,VGS =-10 V Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 9 12 5 15 23 45 3 18 14 20 2.4 3 2.8 4 0.7 -0.7 17 24 7 12 18 22 10 27 37 72 6 32 20 28 ns ns ns ns nC nC nC Drain-Source Diode Characteristics VSD trr Qrr Drain-Source Diode Forward VGS = 0 V, IS = 1.3 A Voltage VGS = 0 V, IS = -1.3 A Q1 Diode Reverse Recovery IF = 6.2 A, diF/dt = 100 A/s Time Q2 Diode Reverse Recovery IF = -4.4 A, diF/dt = 100 A/s Charge (Note 2) (Note 2) 1.2 -1.2 V ns nC Notes: 1. RJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RJC is guaranteed by design while RCA is determined by the user's board design. a) 78C/W when mounted on a 0.5 in2 pad of 2 oz copper b) 125C/W when mounted on a .02 in2 pad of 2 oz copper c) 135C/W when mounted on a minimum pad. Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300s, Duty Cycle < 2.0% 3. BV(avalanche) Single-Pulse rating is guaranteed by design if device is operated within the UIS SOA boundary of the device. FDS4897C Rev C(W) www.fairchildsemi.com FDS4897C Dual N & P-Channel PowerTrench(R) MOSFET Typical Characteristics: Q1 (N-Channel) 20 3 VGS = 10V 4.0V VGS = 3.0V RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 3.5V 2.6 16 ID, DRAIN CURRENT (A) 12 6.0V 4.5V 2.2 1.8 3.5V 1.4 4.0V 4.5V 6.0V 1 10V 8 3.0V 4 0 0 0.5 1 1.5 2 VDS, DRAIN TO SOURCE VOLTAGE (V) 2.5 0.6 0 4 8 12 ID, DRAIN CURRENT (A) 16 20 Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 0.07 1.6 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE ID = 7.0A VGS = 10V ID = 3.5A RDS(ON), ON-RESISTANCE (OHM) 0.06 1.4 0.05 1.2 0.04 1 TA = 125oC 0.03 0.8 TA = 25 C 0.02 o 0.6 -50 -25 0 25 50 75 100 o TJ, JUNCTION TEMPERATURE ( C) 125 150 0.01 2 4 6 8 VGS, GATE TO SOURCE VOLTAGE (V) 10 Figure 3. On-Resistance Variation with Temperature. 20 Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 100 IS, REVERSE DRAIN CURRENT (A) VDS = 10V ID, DRAIN CURRENT (A) 15 VGS = 0V 10 TA = 125oC 1 25oC -55oC 10 TA = 125oC 5 o 0.1 -55 C 0.01 0.001 25oC 0 1 1.5 2 2.5 3 VGS, GATE TO SOURCE VOLTAGE (V) 3.5 0.0001 0 0.2 0.4 0.6 0.8 1 VSD, BODY DIODE FORWARD VOLTAGE (V) 1.2 Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDS4897C Rev C(W) www.fairchildsemi.com FDS4897C Dual N & P-Channel PowerTrench(R) MOSFET Typical Characteristics: Q1 (N-Channel) 10 VGS, GATE-SOURCE VOLTAGE (V) ID = 7A VDS = 10V 1000 f = 1 MHz VGS = 0 V 800 8 20V 30V CAPACITANCE (pF) Ciss 600 6 4 400 Coss 200 2 Crss 0 0 4 8 Qg, GATE CHARGE (nC) 12 16 0 0 5 10 15 20 25 30 VDS, DRAIN TO SOURCE VOLTAGE (V) 35 40 Figure 7. Gate Charge Characteristics. 100 P(pk), PEAK TRANSIENT POWER (W) 50 Figure 8. Capacitance Characteristics. RDS(ON) LIMIT 100s 1ms 10ms 100ms 40 ID, DRAIN CURRENT (A) 10 SINGLE PULSE RJA = 135C/W TA = 25C 30 1 10s DC VGS = 10.0V SINGLE PULSE RJA = 135oC/W TA = 25oC 1s 20 0.1 10 0.01 0.1 1 10 VDS, DRAIN-SOURCE VOLTAGE (V) 100 0 0.001 0.01 0.1 1 t1, TIME (sec) 10 100 1000 Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum Power Dissipation. 50 I(pk), PEAK TRANSIENT CURRENT (A) 100 SINGLE PULSE RJA = 135C/W TA = 25C 40 30 I(AS), AVALANCHE CURRENT (A) TJ = 25 C o 10 20 10 0 0.001 0.01 0.1 1 t1, TIME (sec) 10 100 1000 1 0.01 0.1 1 tAV, TIME IN AVANCHE(ms) 10 Figure 11. Single Pulse Maximum Peak Current. FDS4897C Rev C(W) Figure 12. Unclamped Inductive Switching Capability. www.fairchildsemi.com FDS4897C Dual N & P-Channel PowerTrench(R) MOSFET Typical Characteristics: Q2 (P-Channel) 30 VGS = -10V 25 -ID, DRAIN CURRENT (A) 20 -6.0V 2.6 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE -4.5V -4.0V 2.4 2.2 2 1.8 -4.0V 1.6 -4.5V 1.4 -6.0V 1.2 -10V 1 0.8 VGS = - 3.5V 15 10 -3.5V -3.0V 5 0 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 -VDS, DRAIN TO SOURCE VOLTAGE (V) 0 5 10 15 20 25 30 -ID, DRAIN CURRENT (A) Figure 13. On-Region Characteristics. Figure 14. On-Resistance Variation with Drain Current and Gate Voltage. 0.14 RDS(ON), ON-RESISTANCE (OHM) 1.6 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 1.5 1.4 1.3 1.2 1.1 1 0.9 0.8 0.7 0.6 -50 -25 0 25 50 75 100 o ID = -4.4A VGS = - 10V ID = -2.2A 0.12 0.1 TA = 125oC 0.08 0.06 TA = 25oC 0.04 0.02 125 150 2 4 6 8 10 TJ, JUNCTION TEMPERATURE ( C) -VGS, GATE TO SOURCE VOLTAGE (V) Figure 15. On-Resistance Variation with Temperature. 25 TA = -55oC -IS, REVERSE DRAIN CURRENT (A) VDS = -10V -ID, DRAIN CURRENT (A) 20 125oC 15 25oC Figure 16. On-Resistance Variation with Gate-to-Source Voltage. 100 10 1 0.1 0.01 0.001 0.0001 VGS = 0V TA = 125oC 25oC -55oC 10 5 0 1.5 2 2.5 3 3.5 4 4.5 -VGS, GATE TO SOURCE VOLTAGE (V) 0 0.2 0.4 0.6 0.8 1 1.2 -VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 17. Transfer Characteristics. Figure 18. Body Diode Forward Voltage Variation with Source Current and Temperature. FDS4897C Rev C(W) www.fairchildsemi.com FDS4897C Dual N & P-Channel PowerTrench(R) MOSFET Typical Characteristics: Q2 (P-Channel) 10 -VGS, GATE-SOURCE VOLTAGE (V) 1400 ID = -4.4A 8 VDS = -10V -20V CAPACITANCE (pF) 1200 1000 800 600 400 200 CISS f = 1 MHz VGS = 0 V -30V 6 4 2 COSS CRSS 0 0 5 10 15 20 25 Qg, GATE CHARGE (nC) 0 0 5 10 15 20 25 30 35 40 -VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 19. Gate Charge Characteristics. 100 P(pk), PEAK TRANSIENT POWER (W) Figure 20. Capacitance Characteristics. 50 -ID, DRAIN CURRENT (A) RDS(ON) LIMIT 10 1ms 10ms 100ms 100 40 SINGLE PULSE RJA = 135C/W TA = 25C 30 1 DC 0.1 VGS = -10V SINGLE PULSE RJA = 135oC/W TA = 25oC 0.01 0.1 1 1s 10s 20 10 10 100 0 0.001 0.01 0.1 1 t1, TIME (sec) 10 100 1000 -VDS, DRAIN-SOURCE VOLTAGE (V) Figure 21. Maximum Safe Operating Area. Figure 22. Single Pulse Maximum Power Dissipation. 100 P(pk), PEAK TRANSIENT CURRENT (A) 40 SINGLE PULSE RJA = 135C/W TA = 25C 30 I(AS), AVALANCHE CURRENT (A) TJ = 25 C o 20 10 10 0 0.001 0.01 0.1 1 t1, TIME (sec) 10 100 1000 1 0.01 0.1 1 tAV, TIME IN AVANCHE(ms) 10 Figure 23. Single Pulse Maximum Peak Current Figure 24. Unclamped Inductive Switching Capability FDS4897C Rev C(W) www.fairchildsemi.com FDS4897C Dual N & P-Channel PowerTrench(R) MOSFET Typical Characteristics : N and P-Channel r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 1 D = 0.5 0.2 RJA(t) = r(t) * RJA RJA = 135 C/W P(pk) t1 t2 SINGLE PULSE o 0.1 0.1 0.05 0.02 0.01 0.01 TJ - TA = P * RJA(t) Duty Cycle, D = t1 / t2 0.001 0.0001 0.001 0.01 0.1 t1, TIME (sec) 1 10 100 1000 Figure 25. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1c. Transient thermal response will change depending on the circuit board design. FDS4897C Rev C(W) www.fairchildsemi.com TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACExTM FAST(R) ActiveArrayTM FASTrTM BottomlessTM FPSTM Build it NowTM FRFETTM CoolFETTM GlobalOptoisolatorTM CROSSVOLTTM GTOTM DOMETM HiSeCTM EcoSPARKTM I2CTM E2CMOSTM i-LoTM EnSignaTM ImpliedDisconnectTM FACTTM IntelliMAXTM FACT Quiet SeriesTM Across the board. Around the world.TM The Power Franchise(R) Programmable Active DroopTM DISCLAIMER ISOPLANARTM LittleFETTM MICROCOUPLERTM MicroFETTM MicroPakTM MICROWIRETM MSXTM MSXProTM OCXTM OCXProTM OPTOLOGIC(R) OPTOPLANARTM PACMANTM POPTM Power247TM PowerEdgeTM PowerSaverTM PowerTrench(R) QFET(R) QSTM QT OptoelectronicsTM Quiet SeriesTM RapidConfigureTM RapidConnectTM SerDesTM ScalarPumpTM SILENT SWITCHER(R) SMART STARTTM SPMTM StealthTM SuperFETTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 SyncFETTM TinyLogic(R) TINYOPTOTM TruTranslationTM UHCTM UltraFET(R) UniFETTM VCXTM WireTM FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component is any component of a life 1. Life support devices or systems are devices or support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Preliminary First Production No Identification Needed Full Production Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. I17 |
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